Cyclone EP1C20 Dev Board
Table of contents
After several years of dust, the EP1C20 is getting the latest tools, and returning back to life on my bench. This is a HOWTO with the newest tools.
Assumptions:
- Quartus 9.0 / nios2eds 9.0
- Running the Linux version of Quartus
- USB Blaster JTAG cable
- Quartus is abbreviated to Q9.0 or Q7.2 respectively
Post Quartus 7.2, the Cyclone I is no longer 'fully' supported.
Quartus 9.0 Status
- Compilation works.
- no example for EP1C20 dev board, or any Cyclone I dev boards
- text based jtag does not recognize id 020840DD as EP1C20
- both text / gui programmers are able to program the chip with no problems
- jtagconfig -n does not show niosII nodes, unable to load any nios2 programs
Programming:
Jtag 9.0
Since the nodes are not detected, no programs are able to be uploaded, and hence zero functionality. The example below shows output from jtag 9.0, note that the -n switch should show all running nodes.
[tom@garak full_featured]$ jtagconfig -n
1) USB-Blaster [USB 3-1.1]
020840DD
To get around the limitation, find a jtag_client.so file from quartus 7.2, located in /usr/altera/quartus7.2/linux/libjtag_client.so (note this is my install dir, which may differ).
- rename your original jtag_client.so to jtag_client.so_orig just in case
- overwrite file from ver Q9.0 with the Q7.2 one
- restart jtagd as root if required
Note: the quartus7.2/linux directory contains the jtag_client.so for the 32-bit version. Most Quartus installations come with both 32 and 64 bit versions. If you are running 64 bit, you are well to copy both 32 and 64 versions respectively, but don't mix them up!
- quartus/linux/jtag_client.so 32-bit
- quartus/linux64/jtag_client.so 64-bit
After doing so, the output should finally list the running nodes:
[tom@garak full_featured]$ /software/altera/quartus/bin/jtagconfig -n
1) USB-Blaster [USB 3-1.2]
020840DD EP1C20
Node 11104600
Node 0C006E00
This concludes the programming howto.
Examples from Quartus 7.2
Since the nios2eds 9.0 no longer contains any example designs for any pre Cyclone II boards, the designs have to be borrowed from ver 7.2. Perhaps I will post the files here.
In the dir /software/altera/nios2eds/examples/verilog/niosII_cyclone_1c20/full_featured
you will find the whole project. No changes are necessary to compile with Q9.0
Some warnings about deprecated directives should be ignored.
Contributed By Tom Golubev
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